Semiconductors, CPUs, and the power wall

Open a laptop from 2005 and one from today, and the newer one is far more powerful. But look at one number and it barely moved: the clock speed, the beats per second the chip runs at, sat around 3 to 4 billion per second then, and it sits around 3 to 4 billion per second now. Transistors kept multiplying; the drumbeat stopped speeding up. This lesson is about the tiny switch that makes a computer possible, and the wall of heat that froze its rhythm.

The switch under everything: a transistor

A computer is a mountain of one part repeated billions of times: a switch that electricity controls instead of your finger. In circuits you saw current as charge flowing and voltage as the pressure pushing it. A transistor is a valve on that flow, and the thing that opens or closes the valve is not a lever but a voltage. That is the whole trick. Play with one before we name its parts.

Slide the gate voltage up. Nothing happens for a while, then past a threshold a thin conducting layer, the channel, snaps into existence and current pours from one side to the other. Below the threshold the switch is OFF (a stored 0); above it the switch is ON (a stored 1). A voltage just decided a bit. Wire one transistor with a resistor, as the logic panel shows, and a high input forces a low output: you have built a NOT gate, the atom of all logic.

Why a voltage can open a channel: doping and band gaps

In the quantum leap you met the band gap: the energy step an electron must clear before it is free to carry current. A pure silicon crystal keeps almost every electron locked below that gap, so it barely conducts. The move that makes computing possible is doping - stated here as the engineered fact it is. Add atoms with a spare electron and you get n-type silicon, rich in free negative carriers. Add atoms missing an electron and you get p-type, rich in positive vacancies (holes).

Butt an n-type region against a p-type region and you get a p-n junction, which lets current pass one way and blocks it the other. The transistor in the widget stacks these: two n-type wells (source and drain) sitting in a p-type body, with the gate hovering over the gap on a sliver of insulator. Raising the gate voltage pulls electrons up toward the surface and inverts the p-type body into a temporary n-type bridge - the channel - that connects source to drain. Drop the voltage and the bridge dissolves. The band gap is exactly what makes the OFF state genuinely off: no channel, no easy path across the gap, no current.

Moore's law: the free lunch of shrinking

For decades the whole industry rode one observation. Moore's law is not a law of physics but a trend of manufacturing: every couple of years engineers learned to print transistors about half the size, so twice as many fit in the same area.^[3] Smaller transistors also switch faster and, for a beautiful stretch of years, for free.

The reason they were free has a name. Dennard scaling observed that when you shrink a transistor by some factor, its operating voltage and its capacitance shrink in step, so the power drawn per square millimeter stays put.^[2] More transistors, higher clock, same heat per area. That is the golden age: every generation was smaller, faster, and cooler all at once.

The wall: when the voltage stopped shrinking

Here is the physics, and it reuses power and heat directly. Every time a transistor flips, it charges and discharges a tiny capacitor, and the power that costs is, stated as the switching-power relation:

Read what Dennard's deal was doing to this. Shrinking dropped $C$ and, crucially, $V$, and since $V$ is squared, lowering it paid off twice. That gave room to raise $f$ without $P$ growing. Around 2005 the voltage hit a floor: push it much below roughly a volt and transistors get leaky and unreliable, quietly bleeding current even when idle. With $V$ stuck, the equation turns cruel. Transistors kept shrinking, so you could pack more into each square millimeter, but every one of them now cost the same power, and raising $f$ raised $P$ in lockstep. Power per area, and therefore heat per area, started climbing fast.^[4]

That is the power wall. It is the same limit you met as thermal throttling, now written in silicon: the heat a core makes has to cross a resistance chain into the air, and past a certain clock the chain simply cannot carry it away. Switch to the second tab of the widget and push a single core's frequency. Because a higher clock also forces the voltage back up, power density climbs like the cube of frequency, and long before 8 GHz the core is generating heat no heatsink on Earth could shed.

The escape hatch: go wide, not fast

If you cannot make one core faster without melting it, stop trying. Hold each core at the sustainable clock, right at the wall, and put more cores on the chip. Two cores at 4 GHz do the work of a mythical 8 GHz core, but the heat is spread across twice the silicon instead of concentrated in one spot. That is the multi-core pivot, and it is why the same 2000s that ended the clock race started the age of dual-core, quad-core, and beyond.^[4] In the widget, click up to 8 cores and watch aggregate work climb while each core stays under the wall.

The catch lands squarely on you as a programmer. A single faster core sped up every program for free. Extra cores only help code that can be split into pieces that run at once. The reason concurrency, threads, and parallel algorithms went from exotic to mandatory is not fashion; it is this wall. The hardware stopped handing out free speed, so the software had to learn to spread out.

def dynamic_power(C, V, f):
    return C * V**2 * f          # the switching cost, in arbitrary units

# Dennard's bargain: shrinking dropped V and C together, so power per area held.
# After ~2005 V floors near ~1.0 (leakage), so pushing f just piles on heat:
for f in [2, 3, 4, 6, 8]:        # GHz
    print(f, "GHz ->", dynamic_power(1.0, 1.0, f), "units of heat")

# So the industry pivoted: hold each core at the wall, multiply cores instead.
cores, f_wall = 8, 4
print("8 cores at", f_wall, "GHz do",
      cores * f_wall, "GHz-equivalent of work, heat spread across the die")

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